NDLI: Challenges in managing timing and wiring contracts during hierarchical floorplanning and design closure

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Challenges in managing timing and wiring contracts during hierarchical floorplanning and design closure

Content Provider	ACM Digital Library
Author	Ramji, Shyam
Abstract	The growing complexity and size of designs have driven chip implementation teams to adopt hierarchical design methodologies that divide-and-conquer the design closure task. Wherein, the large chip is partitioned into physical blocks with boundary constraints for physical synthesis which are then integrated at the top-level to achieve overall design closure. Each block could be further partitioned until the block sizes are manageable from a tool turnaround time perspective. A key aspect to efficient hierarchical design involves generation of realistic block-level timing budgets and physical constraints (contracts) to enable parallel implementation of each block. In a typical hierarchical design flow, these block-level contracts are created based on early estimations of timing and wiring from the floorplanning phase but evolve as the design progresses, often requiring several iterations of design integration to converge. High-performance designs require efficient contract management while allowing seamless design closure optimizations across levels of hierarchy. This talk will focus on some of the challenges in managing contracts with emphasis on the implications for physical synthesis tools used in hierarchical design closure.
Starting Page	182
Ending Page	182
Page Count	1
File Format	PDF
ISBN	9781450319546
DOI	10.1145/2451916.2451966
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2013-03-24
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Physical synthesis Hierarchical design
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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