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| Content Provider | ACM Digital Library |
|---|---|
| Author | Bhattacharyya, Kaushik Das, Tamal Mandal, Pradip Kumar, P.V. Ratna |
| Abstract | This paper presents a non overlapped rotational time interleaving scheme to eliminate shoot-through current in switched capacitor dc-dc converters. In addition to the improvement of power efficiency this scheme also reduces the output voltage ripple. In the integrated converter, current regulation control is incorporated with the basic switched capacitor converter to get the output voltage at a pre-specified level. The proposed converter has been designed in 0.18μm CMOS process with a total flying capacitance of 330pF and load capacitance of 50pF. The capacitors are chosen such that on-chip implementation is possible. The basic switched capacitor converter provides 3.3V to 1.45V conversion and achieves power efficiency of 80.7% and output voltage ripple of 5.7mV at 10mA output current. For the same output current the integrated converter achieves a power power efficiency of 73.5% and output voltage ripple of 5mV for 1.35V output voltage. |
| Starting Page | 81 |
| Ending Page | 86 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781605586847 |
| DOI | 10.1145/1594233.1594252 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2009-08-19 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Switched capacitor converter Shoot-through current Time interleaving |
| Content Type | Text |
| Resource Type | Article |
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