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| Content Provider | ACM Digital Library |
|---|---|
| Author | Onoye, Takao Mitsuyama, Yukio Hamamoto, Koichi Hashimoto, Masanori |
| Abstract | Post-fabrication tuning for mitigating manufacturing variability is receiving a significant attention. To reduce leakage increase involved in performance compensation by body biasing, body bias clustering methods have been proposed. However, conventional methods suffer from a large test cost for tuning after fabrication, since there are a tremendous number of body bias assignments. We in this paper propose a low-cost tuning scheme after fabrication and present a layout aware body bias clustering method. The proposed method estimates average leakage power after post-fabrication tuning, and minimizes it. We applied the proposed method to ultralow voltage circuits for suppressing their high sensitivity to random Vth variability, and demonstrated the effectiveness of the proposed method. In the experiments, by just introducing two clusters, leakage power after post-fabrication tuning was reduced by up to 70% compared to a single cluster case. |
| Starting Page | 51 |
| Ending Page | 56 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781605586847 |
| DOI | 10.1145/1594233.1594246 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2009-08-19 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Manufacturing variability Subthreshold circuits Layout Performance compensation Body bias clustering |
| Content Type | Text |
| Resource Type | Article |
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