NDLI: An efficient incremental algorithm for min-area retiming

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An efficient incremental algorithm for min-area retiming

Content Provider	ACM Digital Library
Author	Wang, Jia Zhou, Hai
Abstract	As one of the most effective sequential optimization techniques, retiming is a structural transformation that relocates flip-flops in a circuit without changing its functionality. The min-area retiming problem seeks a solution with the minimum flip-flop area (or number) under a given clock period. Even though having polynomial runtime, the best existing algorithms for this problem still need to first construct a dense path graph and then find a min-cost network flow on it, thus incur huge storage and time expenses for large circuits. Recently, provable incremental algorithms have been discovered for min-period retiming, and heuristic incremental algorithms have been proposed for min-area retiming. However, given the complexity of the problem, min-area retiming is still resisting an efficient provable incremental algorithm. In this paper, we fill the gap by presenting an efficient algorithm to solve the min-area retiming problem incrementally and optimally. Contrary to existing approaches, no dense path graph is constructed; only the active timing constraints are dynamically generated in the algorithm. Experimental results show that the total runtime of our algorithm for all the benchmarks is at least 60 x faster than the best existing approach.
Starting Page	528
Ending Page	533
Page Count	6
File Format	PDF
ISBN	9781605581156
ISSN	0738100X
DOI	10.1145/1391469.1391603
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2008-06-08
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Retiming
Content Type	Text
Resource Type	Article

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