NDLI: Performance Impact of a Slower Main Memory: A case study of STT-MRAM in HPC

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Performance Impact of a Slower Main Memory: A case study of STT-MRAM in HPC

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Performance Impact of a Slower Main Memory: A case study of STT-MRAM in HPC

Content Provider	ACM Digital Library
Author	Asifuzzaman, Kazi Pavlovic, Milan Radulovic, Milan Zaragoza, David Radojković, Petar Ryoo, Kyung-Chang Kwon, Ohseong
Abstract	In high-performance computing (HPC), significant effort is invested in research and development of novel memory technologies. One of them is Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) --- byte-addressable, high-endurance non-volatile memory with slightly higher access time than DRAM. In this study, we conduct a preliminary assessment of HPC system performance impact with STT-MRAM main memory with recent industry estimations. Reliable timing parameters of STT-MRAM devices are unavailable, so we also perform a sensitivity analysis that correlates overall system slowdown trend with respect to average device latency. Our results demonstrate that the overall system performance of large HPC clusters is not particularly sensitive to main-memory latency. Therefore, STT-MRAM, as well as any other emerging non-volatile memories with comparable density and access time, can be a viable option for future HPC memory system design.
Starting Page	40
Ending Page	49
Page Count	10
File Format	PDF
ISBN	9781450343053
DOI	10.1145/2989081.2989082
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2016-10-03
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Main memory High-performance computing Stt-mram
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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