NDLI: Using network interface support to avoid asynchronous protocol processing in shared virtual memory systems

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Volume 27, Issue 5, Dec. 1999

Volume 27, Issue 4, Sept. 1999

Volume 27, Issue 3, June 1999

Volume 27, Issue 2, May 1999

Dynamic vectorization

Speculation techniques for improving load related instruction scheduling

Correlated load-address predictors

Selective value prediction

Tolerating late memory traps in ILP processors

Memory forwarding

Decoupling local variable accesses in a wide-issue superscalar processor

Effective jump-pointer prefetching for linked data structures

Performance of image and video processing with general-purpose processors and media ISA extensions

A hardware-driven profiling scheme for identifying program hot spots to support runtime optimization

Commit-reconcile & fences (CRF)

Is SC + ILP = RC?

Memory sharing predictor

Simultaneous subordinate microthreading (SSMT)

The block-based trace cache

The program decision logic approach to predicated execution

A performance comparison of contemporary DRAM architectures

A scalable front-end architecture for fast instruction delivery

Area efficient architectures for information integrity in cache memories

Value prediction in VLIW machines

Storageless value prediction using prior register values

Using network interface support to avoid asynchronous protocol processing in shared virtual memory systems

Multicast snooping

Scaling application performance on a cache-coherent multiprocessor

Volume 27, Issue 1, March 1999

Using network interface support to avoid asynchronous protocol processing in shared virtual memory systems

Content Provider	ACM Digital Library
Author	Bilas, Angelos Singh, Jaswinder Pal Liao, Cheng
Abstract	The performance of page-based software shared virtual memory (SVM) is still far from that achieved on hardware-coherent distributed shared memory (DSM) systems. The interrupt cost for asynchronous protocol processing has been found to be a key source of performance loss and complexity.This paper shows that by providing simple and general support for asynchronous message handling in a commodity network interface (NI), and by altering SVM protocols appropriately, protocol activity can be decoupled from asynchronous message handling and the need for interrupts or polling can be eliminated. The NI mechanisms needed are generic, not SVM-dependent. They also require neither visibility into the node memory system nor code instrumentation to identify memory operations. We prototype the mechanisms and such a synchronous home-based LRC protocol, called GeNIMA (GEneral-purpose Network Interface support in a shared Memory Abstraction), on a cluster of SMPs with a programmable NI, though the mechanisms are simple and do not require programmability.We find that the performance improvements are substantial, bringing performance on a small-scale SMP cluster much closer to that of hardware-coherent shared memory for many applications, and we show the value of each of the mechanisms in different applications. Application performance improves by about 37% on average for reasonably well performing applications, even on our relatively slow programmable NI, and more for others. We discuss the key remaining bottlenecks at the protocol level and use a firmware performance monitor in the NI to understand the interactions with and the implications for the communication layer.
Starting Page	282
Ending Page	293
Page Count	12
File Format	PDF
ISSN	01635964
DOI	10.1145/307338.301003
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	27
Issue Number	2
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article

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