NDLI: Performance of image and video processing with general-purpose processors and media ISA extensions

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Volume 27, Issue 5, Dec. 1999

Volume 27, Issue 4, Sept. 1999

Volume 27, Issue 3, June 1999

Volume 27, Issue 2, May 1999

Dynamic vectorization

Speculation techniques for improving load related instruction scheduling

Correlated load-address predictors

Selective value prediction

Tolerating late memory traps in ILP processors

Memory forwarding

Decoupling local variable accesses in a wide-issue superscalar processor

Effective jump-pointer prefetching for linked data structures

Performance of image and video processing with general-purpose processors and media ISA extensions

A hardware-driven profiling scheme for identifying program hot spots to support runtime optimization

Commit-reconcile & fences (CRF)

Is SC + ILP = RC?

Memory sharing predictor

Simultaneous subordinate microthreading (SSMT)

The block-based trace cache

The program decision logic approach to predicated execution

A performance comparison of contemporary DRAM architectures

A scalable front-end architecture for fast instruction delivery

Area efficient architectures for information integrity in cache memories

Value prediction in VLIW machines

Storageless value prediction using prior register values

Using network interface support to avoid asynchronous protocol processing in shared virtual memory systems

Multicast snooping

Scaling application performance on a cache-coherent multiprocessor

Volume 27, Issue 1, March 1999

Performance of image and video processing with general-purpose processors and media ISA extensions

Content Provider	ACM Digital Library
Author	Ranganathan, Parthasarathy Adve, Sarita Jouppi, Norman P.
Abstract	This paper aims to provide a quantitative understanding of the performance of image and video processing applications on general-purpose processors, without and with media ISA extensions. We use detailed simulation of 12 benchmarks to study the effectiveness of current architectural features and identify future challenges for these workloads.Our results show that conventional techniques in current processors to enhance instruction-level parallelism (ILP) provide a factor of 2.3X to 4.2X performance improvement. The Sun VIS media ISA extensions provide an additional 1.1X to 4.2X performance improvement. The ILP features and media ISA extensions significantly reduce the CPU component of execution time, making 5 of the image processing benchmarks memory-bound.The memory behavior of our benchmarks is characterized by large working sets and streaming data accesses. Increasing the cache size has no impact on 8 of the benchmarks. The remaining benchmarks require relatively large cache sizes (dependent on the display sizes) to exploit data reuse, but derive less than 1.2X performance benefits with the larger caches. Software prefetching provides 1.4X to 2.5X performance improvement in the image processing benchmarks where memory is a significant problem. With the addition of software prefetching, all our benchmarks revert to being compute-bound.
Starting Page	124
Ending Page	135
Page Count	12
File Format	PDF
ISSN	01635964
DOI	10.1145/307338.300990
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	27
Issue Number	2
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article

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