NDLI: Resource Sharing Centric Dynamic Voltage and Frequency Scaling for CMP Cores, Uncore, and Memory

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ACM Transactions on Design Automation of Electronic Systems (TODAES) : Volume 22

ACM Transactions on Design Automation of Electronic Systems (TODAES) : Volume 21

Issue 4, September 2016

Streaming Sorting Networks

Statistical Rare-Event Analysis and Parameter Guidance by Elite Learning Sample Selection

Construction of Reconfigurable Clock Trees for MCMM Designs Using Mode Separation and Scenario Compression

A Hardware-Assisted Energy-Efficient Processing Model for Activity Recognition Using Wearables

Power, Area, and Performance Optimization of Standard Cell Memory Arrays Through Controlled Placement

On Battery Recovery Effect in Wireless Sensor Nodes

Accurate Modeling of Nonideal Low-Power PWM DC-DC Converters Operating in CCM and DCM using Enhanced Circuit-Averaging Techniques

Cyber-Physical Co-Simulation Framework for Smart Cells in Scalable Battery Packs

FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs

Timing Path-Driven Cycle Cutting for Sequential Controllers

Hierarchical Statistical Leakage Analysis and Its Application

Efficient Algorithms for Discrete Gate Sizing and Threshold Voltage Assignment Based on an Accurate Analytical Statistical Yield Gradient

Ensemble Reduction via Logic Minimization

N-Detection Test Sets for Circuits with Multiple Independent Scan Chains

Resource Sharing Centric Dynamic Voltage and Frequency Scaling for CMP Cores, Uncore, and Memory

Area-Aware Decomposition for Single-Electron Transistor Arrays

Library-Based Placement and Routing in FPGAs with Support of Partial Reconfiguration

Index-Resilient Zero-Suppressed BDDs: Definition and Operations

Issue 3(Special Section on New Physical Design Techniques for the Next Generation Integration Technology and Regular Papers), July 2016

Issue 2, January 2016

Issue 1, November 2015

ACM Transactions on Design Automation of Electronic Systems (TODAES) : Volume 20

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ACM Transactions on Design Automation of Electronic Systems (TODAES) : Volume 3

ACM Transactions on Design Automation of Electronic Systems (TODAES) : Volume 2

ACM Transactions on Design Automation of Electronic Systems (TODAES) : Volume 1

Resource Sharing Centric Dynamic Voltage and Frequency Scaling for CMP Cores, Uncore, and Memory

Content Provider	ACM Digital Library
Author	Gratz, Paul V. Hu, Jiang Won, Jae-Yeon Shakkottai, Srinivas
Copyright Year	2016
Abstract	With the breakdown of Dennard’s scaling over the past decade, performance growth of modern microprocessor design has largely relied on scaling core count in chip multiprocessors (CMPs). The challenge of chip power density, however, remains and demands new power management solutions. This work investigates a coordinated CMP systemwide Dynamic Voltage and Frequency Scaling (DVFS) policy centered around shared resource utilization. This approach represents a new angle on the problem, differing from the conventional core-workload-driven approaches. The key component of our work is per-core DVFS leveraging a technique similar to TCP Vegas congestion control from networking. This TCP Vegas–based DVFS can potentially identify the synergy between power reduction and performance improvement. Further, this work includes uncore (on-chip interconnect and shared last level cache) and main memory DVFS policies coordinated with the per-core DVFS policy. Full system simulations on PARSEC benchmarks show that our technique reduces total energy dissipation by over 47% across all benchmarks with less than 2.3% performance degradation. Our work also leads to 12% more energy savings compared to a prior work CMP DVFS policy.
Starting Page	1
Ending Page	25
Page Count	25
File Format	PDF
ISSN	10844309
e-ISSN	15577309
DOI	10.1145/2897394
Volume Number	21
Issue Number	4
Journal	ACM Transactions on Design Automation of Electronic Systems (TODAES)
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2016-05-27
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Chip multi-processor Coordination Cores Dynamic voltage frequency scaling Memory Power management Resource sharing
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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Dynamic Voltage and Frequency Management Based on Variable Update Intervals for Frequency Setting

In-network monitoring and control policy for DVFS of CMP networks-on-chip and last level caches

Total Energy Minimization of Real-Time Tasks in an On-Chip Multiprocessor Using Dynamic Voltage Scaling Efficiency Metric

Multi-optimization power management for chip multiprocessors

Dynamic voltage and frequency management based on variable update intervals for frequency setting

Power-aware performance increase via core/uncore reinforcement control for chip-multiprocessors

System-Level Power Management Using Online Learning

Network flow techniques for dynamic voltage scaling in hard real-time systems

Power efficiency of voltage scaling in multiple clock, multiple voltage cores

Resource Sharing Centric Dynamic Voltage and Frequency Scaling for CMP Cores, Uncore, and Memory

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Dynamic Voltage and Frequency Management Based on Variable Update Intervals for Frequency Setting

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Total Energy Minimization of Real-Time Tasks in an On-Chip Multiprocessor Using Dynamic Voltage Scaling Efficiency Metric

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Resource Sharing Centric Dynamic Voltage and Frequency Scaling for CMP Cores, Uncore, and Memory