NDLI: An Innovative Design: MOS Based Full-Wave Centre-Tapped Rectifier

Content Provider	Springer Nature Link
Author	Jain, Prateek Akashe, Shyam
Copyright Year	2016
Abstract	A novel, more competent, low leakage and comparatively high speed full-wave centre-tapped rectifier is introduced with minimum distortion. Proficient and exploratory combinations of PMOS–PMOS or NMOS–NMOS logic are utilized to design full-wave centre-tapped rectifier. The scrupulous PMOS–PMOS logic with augmented stacked NMOS transistor is communal form of two PMOS and one NMOS transistor. The main motive of manipulating these circuits is to maintain the substrate biasing during circuit operation. The substrate biasing refers the exploitation in which substrate and drain/source terminal of a transistor is kept in reverse biasing mode. Due to utilization of modified MOS structure after replacing of diode, efficiency of full-wave centre-tapped rectifier is increased up to 20 % with compare to p-n junction diode based full wave centre-tapped rectifier and leakage power dissipation is reduced up to 57 %. The proposed circuit is designed to utilize the body effect properly to reduce the total leakage power of the circuit. The novelty of proposed circuit is the uniqueness of combination of MOS. Due to this; the proposed circuit has impressive resultant parameter with compare to other circuits and previous results. Proposed MOS based full-wave centre-tapped rectifier is optimized at 45 nm CMOS technology and cadence simulation experimental implementations of the leakage power and efficiency demonstrate better consistency through the proposed circuit.
Starting Page	1673
Ending Page	1693
Page Count	21
File Format	PDF
ISSN	09296212
Journal	Wireless Personal Communications
Volume Number	90
Issue Number	4
e-ISSN	1572834X
Language	English
Publisher	Springer US
Publisher Date	2016-06-13
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	NMOS Leakage power PMOS Body effect Substrate biasing Low power circuit Full-wave centre-tapped rectifier Efficiency Communications Engineering, Networks Signal,Image and Speech Processing Computer Communication Networks
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Computer Science Applications

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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