NDLI: Guidance of Loop Ordering for Reduced Memory Usage in Signal Processing Applications

Content Provider	Springer Nature Link
Author	Kjeldsberg, Per Gunnar Catthoor, Francky Verdoolaege, Sven Palkovic, Martin Vandecappelle, Arut Hu, Qubo Aas, Einar J.
Copyright Year	2008
Abstract	Data dominated signal processing applications are typically described using large and multi-dimensional arrays and loop nests. The order of production and consumption of array elements in these loop nests has huge impact on the amount of memory required during execution. This is essential since the size and complexity of the memory hierarchy is the dominating factor for power, performance and chip size in these applications. This paper presents a number of guiding principles for the ordering of the dimensions in the loop nests. They enable the designer, or design tools, to find the optimal ordering of loop nest dimensions for individual data dependencies in the code. We prove the validity of the guiding principles when no prior restrictions are given regarding fixation of dimensions. If some dimensions are already fixed at given nest levels, this is taken into account when fixing the remaining dimensions. In most cases an optimal ordering is found for this situation as well. The guiding principles can be used in the early design phases in order to enable minimization of the memory requirement through in-place mapping. We use real life examples to show how they can be applied to reach a cost optimized end product. The results show orders of magnitude improvement in memory requirement compared to using the declared array sizes, and similar penalties for choosing the suboptimal ordering of loops when in-place mapping is exploited.
Starting Page	301
Ending Page	321
Page Count	21
File Format	PDF
ISSN	19398018
Journal	Journal of Signal Processing Systems
Volume Number	53
Issue Number	3
e-ISSN	19398115
Language	English
Publisher	Springer US
Publisher Date	2008-06-06
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Memory optimization Memory architecture exploration High level synthesis Code transformation Multi-media Computer Imaging, Vision, Pattern Recognition and Graphics Pattern Recognition Image Processing and Computer Vision Electronic and Computer Engineering Circuits and Systems Signal, Image and Speech Processing
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Signal Processing Control and Systems Engineering Information Systems Modeling and Simulation Hardware and Architecture

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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