NDLI: Hardware/Software Co-reconfigurable Instruction Decoder for Adaptive Multi-core DSP Architectures

Content Provider	Springer Nature Link
Author	Jung, Yong Kyu
Copyright Year	2010
Abstract	A programmable instruction decoder (PID) is introduced for designing adaptive multi-core DSP architectures by using a hardware/software co-reconfigurable approach without employing programmable devices. This PID permits DSP software developers for post-manufacturing modification of their DSP instruction sets to add their application-specific instructions whenever necessary. In addition, PID offers software developers an enhanced means to utilize the underlying DSP architectures by rescheduling implemented micro-operations for their tailored instructions in the DSP processors. Thus, emerging DSP applications can be swiftly and efficiently re-imported to PID-based DSP processors without re-fabrication of new DSP chips. In addition to instruction-level modification, an innovative instruction-packing procedure for PID is presented for further enhancement of the PID-based DSP systems. PID architecture was developed and implemented in VHDL. The PID-based DSP systems were also developed and evaluated to demonstrate various post-manufacturing adaptabilities in DSP processor systems. Various multi-core DSP architectures based on Texas Instruments’ TMS320C55 DSP processor were used for evaluating performance and adaptability of this new programmable instruction decoder.
Starting Page	273
Ending Page	285
Page Count	13
File Format	PDF
ISSN	19398018
Journal	Journal of Signal Processing Systems
Volume Number	62
Issue Number	3
e-ISSN	19398115
Language	English
Publisher	Springer US
Publisher Date	2010-03-17
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Programmable DSP Instruction set extension Instruction packing Hardware/software co-reconfiguration Programmable instruction decoder Adaptive computer Multi-processor SoC (MPSoC) Pattern Recognition Electrical Engineering Circuits and Systems Computer Imaging, Vision, Pattern Recognition and Graphics Image Processing and Computer Vision Signal, Image and Speech Processing
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Signal Processing Control and Systems Engineering Information Systems Modeling and Simulation Hardware and Architecture

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