NDLI: Fast and efficient commits for Lazy-Lazy hardware transactional memory

Content Provider	Springer Nature Link
Author	Gaona, Epifanio Abellán, José L. Acacio, Manuel E.
Copyright Year	2015
Abstract	Transactional memory (TM) is a compelling alternative to simplify multithreaded programming that traditionally relies on error-prone lock-based synchronization for implementing cooperative tasks. Lazy-Lazy hardware TM is one of the most efficient schemes in today’s hardware TM systems. Nonetheless, the commit protocol in these systems has severe impact on performance and energy. The SEQ in Scalable-TCC implementation (STCC-SEQ) is the most popular and efficient commit protocol to date. In this paper, we propose GCommit, a cost-effective hardware-based STCC-SEQ protocol. GCommit employs a G-Arbiter microarchitecture for achieving minimal-latency and high-efficient commits. We implement G-Arbiter with a standard 45 nm cell library. For a target 16-core CMP, a G-Arbiter just represents 0.07 % of the whole on-chip area, requiring marginal energy consumption. Full-system simulations of the target system with the STAMP benchmarks show that GCommit achieves average reductions of 15.7 and 13.7 % in execution time and energy, respectively, when compared with STCC-SEQ.
Starting Page	4305
Ending Page	4326
Page Count	22
File Format	PDF
ISSN	09208542
Journal	The Journal of Supercomputing
Volume Number	71
Issue Number	12
e-ISSN	15730484
Language	English
Publisher	Springer US
Publisher Date	2015-09-21
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Manycore CMPs Hardware transactional memory (HTM) Lazy-Lazy HTM Transaction commit Programming Languages, Compilers, Interpreters Processor Architectures Computer Science
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Information Systems Hardware and Architecture Software

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