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| Content Provider | Springer Nature Link |
|---|---|
| Author | Jenihhin, Maksim Squillero, Giovanni Copetti, Thiago Santos Tihhomirov, Valentin Kostin, Sergei Gaudesi, Marco Vargas, Fabian Raik, Jaan Sonza Reorda, Matteo Bolzani Poehls, Leticia Ubar, Raimund Medeiros, Guilherme Cardoso |
| Copyright Year | 2016 |
| Abstract | The Negative Bias Temperature Instability (NBTI) phenomenon is agreed to be one of the main reliability concerns in nanoscale circuits. It increases the threshold voltage of pMOS transistors, thus, slows down signal propagation along logic paths between flip-flops. NBTI may cause intermittent faults and, ultimately, the circuit’s permanent functional failures. In this paper, we propose an innovative NBTI mitigation approach by rejuvenating the nanoscale logic along NBTI-critical paths. The method is based on hierarchical identification of NBTI-critical paths and the generation of rejuvenation stimuli using an Evolutionary Algorithm. A new, fast, yet accurate model for computation of NBTI-induced delays at gate-level is developed. This model is based on intensive SPICE simulations of individual gates. The generated rejuvenation stimuli are used to drive those pMOS transistors to the recovery phase, which are the most critical for the NBTI-induced path delay. It is intended to apply the rejuvenation procedure to the circuit, as an execution overhead, periodically. Experimental results performed on a set of designs demonstrate reduction of NBTI-induced delays by up to two times with an execution overhead of 0.1 % or less. The proposed approach is aimed at extending the reliable lifetime of nanoelectronics. |
| Starting Page | 273 |
| Ending Page | 289 |
| Page Count | 17 |
| File Format | |
| ISSN | 09238174 |
| Journal | Journal of Electronic Testing |
| Volume Number | 32 |
| Issue Number | 3 |
| e-ISSN | 15730727 |
| Language | English |
| Publisher | Springer US |
| Publisher Date | 2016-05-12 |
| Publisher Place | New York |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | Hardware rejuvenation Aging NBTI Critical path identification Logic circuit Evolutionary computation MicroGP zamiaCAD Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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