NDLI: Self-aware Memory: an adaptive memory management system for upcoming manycore architectures and its decentralized self-optimization process

Content Provider	Springer Nature Link
Author	Mattes, Oliver Karl, Wolfgang
Copyright Year	2014
Abstract	The number of cores per processor has been increased on and on in recent years. Carrying on with that, manycore processor systems will be the future system structure, and even within range for usage in desktop or mobile systems. But today’s manycore processors are primarily designed for high performance applications. Access to the external memory from the individual cores is avoided. As yet the system memory commonly consists of only one or a few memory components and offers access over a small number of controllers. This leads to congestion, inefficient memory assignment and the scalability of the memory is limited. However, there will be additional new scenarios, with multiple concurrently running dynamic applications, changing I/O characteristics and a not predictable memory usage in the near future. Highly dynamic workloads with varying memory usage have to be utilized. Consequently, the memory management must become more flexible and distributed in nature. Moreover, dynamic memory allocation will be a necessity, and a transparent optimization of the physical memory resource utilization can be done with integrated self-organization mechanisms, e.g. for locality, load distribution or energy efficiency issues. The autonomous self-optimizing memory architecture Self-aware Memory satisfies all these challenges with a scalable pooling of fully-decentralized interacting memory components. With it, flexible, reliable and scalable memory management is available. Access to private and shared memory is enabled in a flexible way and efficient synchronization mechanism are offered while contemporaneously providing comfortable usage and supporting well-known programming mechanisms. The presented evaluation addresses the parameters of the included self-optimization mechanism and their impact on the optimization. The results show that the overhead of the decentralized optimization process is amortized by the optimized runtime using the appropriate parameter settings.
Starting Page	739
Ending Page	769
Page Count	31
File Format	PDF
ISSN	09295585
Journal	Design Automation for Embedded Systems
Volume Number	17
Issue Number	3-4
e-ISSN	15728080
Language	English
Publisher	Springer US
Publisher Date	2014-11-06
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Optimization Adaptation Memory management Self-aware Memory (SaM) Manycore systems Scalability Circuits and Systems Computer-Aided Engineering (CAD, CAE) and Design Special Purpose and Application-Based Systems
Content Type	Text
Resource Type	Article
Subject	Software Hardware and Architecture

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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