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Method for Improving Execution Performance of Multiply Add Instruction during Compling Technical Field of the Invention
| Content Provider | Semantic Scholar |
|---|---|
| Copyright Year | 2017 |
| Abstract | (57) ABSTRACT The present invention relates to a method for improving execution performance of multiply–add instructions during compiling, comprising the following steps of compiling a Source code by a compiler to acquire internal representation; optimizing; generating a machine code on the basis of a target processor, and allocating a physical register to a pseudo register in the machine code; and improving results of register allocation to multiply-accumulate instructions. The method for improving execution performance of multiply–add instructions during compiling provided by the present inven tion has the following advantages: the compiler is allowed to realize procedure optimization by acquiring the optimal MAC (multiply-accumulate) instruction use gain. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://patentimages.storage.googleapis.com/74/6f/90/e3c9ca7fdb4a06/US20140325190A1.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |