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A Timing-Based Split-Path Sensing Circuit for STT-MRAM
| Content Provider | MDPI |
|---|---|
| Author | Ishdorj, Bayartulga Kim, Jeongyeon Kim, Jae Hwan Na, Taehui |
| Copyright Year | 2022 |
| Description | Spin-transfer torque magnetoresistive random access memory (STT-MRAM) applications have received considerable attention as a possible alternative for universal memory applications because they offer a cost advantage comparable to that of a dynamic RAM with fast performance comparable to that of a static RAM, while solving the scaling issues faced by conventional MRAMs. However, owing to the decrease in supply voltage $(V_{DD}$) and increase in process fluctuations, STT-MRAMs require an advanced sensing circuit (SC) to ensure a sufficient read yield in deep submicron technology. In this study, we propose a timing-based split-path SC (TSSC) that can achieve a greater read yield compared to a conventional split-path SC (SPSC) by employing a timing-based dynamic reference voltage technique to minimize the threshold voltage mismatch effects. Monte Carlo simulation results based on industry-compatible 28-nm model parameters reveal that the proposed TSSC method obtains a 42% higher read access pass yield at a nominal $V_{DD}$ of 1.0 V compared to the SPSC in terms of iso-area and -power, trading off 1.75× sensing time. |
| Starting Page | 1004 |
| e-ISSN | 2072666X |
| DOI | 10.3390/mi13071004 |
| Journal | Micromachines |
| Issue Number | 7 |
| Volume Number | 13 |
| Language | English |
| Publisher | MDPI |
| Publisher Date | 2022-06-26 |
| Access Restriction | Open |
| Subject Keyword | Micromachines Hardware and Architecturee Dynamic Reference Voltage Read Disturbance Read Yield Sense Amplifier Sensing Circuit Spin-transfer Torque Magnetoresistive Random Access Memory (stt-mram) |
| Content Type | Text |
| Resource Type | Article |
