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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jisu Kim Kyungho Ryu Jung Pill Kim Kang, S.H. Seong-Ook Jung |
| Copyright Year | 1993 |
| Abstract | Conventional spin transfer torque MRAM sensing circuits suffer from a small sensing margin and a large sensing margin variation in deep submicron technologies. The small sensing margin issue becomes worse in the low-leakage process technology due to the higher threshold voltage. In this brief, the self-body biasing (self-BB) scheme is proposed to resolve the small sensing margin issue. In the self-BB scheme, the threshold voltage of load pMOS is adaptively controlled by body bias. Although leakage current 'lows through the body due to the positive junction bias voltage, it is well suppressed to less than 1% (0.3 μA) of the sensing current and 'lows only during the sensing operation. To reduce large sensing margin variation, the source degeneration scheme with the longer channel length is used for the load pMOS. The HSPICE simulation results obtained using low-leakage 45-nm model parameters show that the proposed sensing circuit achieves a probability of the read access pass yield (PRAPY Memory) of 100%, whereas the sensing circuit without BB scheme has an PRAPY Memory of 5.8% for a 32-Mb memory with a sensing time of 2 ns. |
| Sponsorship | IEEE Computer Society Association for Computing Machinery (ACM)/SIGDA IEEE Computer Society Technical Committee on Design Automation |
| Starting Page | 1630 |
| Ending Page | 1634 |
| Page Count | 5 |
| File Size | 797673 |
| File Format | |
| ISSN | 10638210 |
| Volume Number | 22 |
| Issue Number | 7 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-01-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Sensors Leakage currents Transistors Torque Integrated circuit modeling Random access memory spin transfer torque MRAM (STT-MRAM). Body biasing IO device sensing circuit sensing margin spin transfer torque MRAM (STT-MRAM) |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering Software Hardware and Architecture |
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