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| Content Provider | IET Digital Library |
|---|---|
| Author | Sasaki, Takahiro Nakabayashi, Tomoyuki Nomura, Kazumasa Ohno, Kazuhiko Kondo, Toshio |
| Abstract | This study proposes a fine-grain-mode transition method for variable stages pipeline (VSP) processor. The method is based on dynamic memory access analysing and it reduces energy consumption. A VSP processor varies the pipeline depth dynamically according to workload. When the workload is heavy, the processor shifts into a high-speed mode that drives a deep pipeline at a high clock frequency. When the workload is light, the processor shifts into a low-energy mode that unifies pipeline stages to make the pipeline shallower and drives it at a low clock frequency. The conventional mode transition method cannot follow sharp workload changes because it takes a long time to predict workload. The fine-grain pipeline depth control, this study proposes, is based on a high-speed workload prediction mechanism using memory access frequency, and it uses a novel method to conceal the overhead because of changing the pipeline depth. Simulation results show that the authors approach can reduce the energy-delay product 10% below what it would be with the conventional approach. |
| Starting Page | 41 |
| Ending Page | 47 |
| Page Count | 7 |
| ISSN | 17518601 |
| Volume Number | 7 |
| e-ISSN | 1751861X |
| Issue Number | Issue 1, Jan (2013) |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/iet-cdt/7/1 |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/iet-cdt.2012.0067 |
| Journal | IET Computers & Digital Techniques |
| Access Restriction | Open |
| Rights Holder | © The Institution of Engineering and Technology |
| Subject Keyword | Clock Frequency Dynamic Memory Access Analysis Energy Consumption Energy-delay Product File Organisation Fine-grain-mode Transition Method High-speed Mode Low-energy Mode Memory Access Frequency Multiprocessing System Performance Evaluation And Testing Pipeline Depth Pipeline Processing Power Aware Computing Storage Management Variable Stage Pipeline Processor VSP Processor Workload Change Workload Prediction Mechanism |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering Hardware and Architecture Software |
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