NDLI: The Design and Implementation of Embedded Security CPU Based on Multi-strategy

Content Provider	IET Digital Library
Author	Li, Dongfang Zhan, Xin Tong, Qiaoling Zou, Xuecheng Liu, Zhenglin
Abstract	Control flow monitoring, information flow tracking and memory monitoring are the three main solutions to enhance the security of embedded system at the hardware architecture level. However, most of the current studies about the security of embedded system consider the above solutions in separate dimensions rather than a combined effort. We start from the operation model at the instruction level, and propose a security multi-strategy which combines information flow tracking and memory monitoring by studying the security operating mechanism of embedded system. As a hardware approach this strategy extends the embedded processor architecture with additional security defense control. The experimental results show this multi-strategy is more effective and can detect more malicious attacks than a single solution. The effectiveness of our proposed security multi-strategy has been verified in a Field programmable gate array (FPGA) prototype platform based on a customized Leon3 microprocessor.
Starting Page	801
Ending Page	806
Page Count	6
ISSN	10224653
Volume Number	25
e-ISSN	20755597
Issue Number	Issue 5, Sep (2016)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/cje/25/5
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/cje.2016.08.040
Journal	Chinese Journal of Electronics
Publisher Date	2016-09-01
Access Restriction	Open
Rights Holder	© Chinese Institute of Electronics
Subject Keyword	Control Flow Monitoring Customized Leon3 Microprocessor Digital Circuit Design, Modelling And Testing Embedded Processor Architecture Embedded Security CPU Embedded System Embedded System Security Field Programmable Gate Array Field Programmable Gate Array Prototype Platform FPGA Prototype Platform Hardware Architecture Level Information Flow Tracking Logic And Switching Circuit Logic Circuit Malicious Attack Memory Monitoring Microprocessor Chips Microprocessors And Microcomputer Security Defense Control Security Multistrategy Security of Data Security Operating Mechanism
Content Type	Text
Resource Type	Article
Subject	Applied Mathematics Electrical and Electronic Engineering

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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