NDLI: Performance analysis of dynamic CMOS circuit based on node-discharger and twist-connected transistors

Content Provider	IET Digital Library
Author	Vaithiyanathan, Dhandapani Kumar, Ravindra Rai, Ashima Sharma, Khushboo
Abstract	The incessant growth of devices such as mobile phones, digital cameras, and other portable electronic gadgets has led to a higher amount of research being dedicated to the low power digital and analogue circuits. In this study, a low power-delay-product (PDP) dynamic complementary metal oxide semiconductor (CMOS) circuit design using small swing domino logic with twist-connected transistors is proposed. An improvement in PDP can be achieved by using a node-discharger circuit in the conventional design. The conventional benchmark and modified circuits are implemented in 90 nm CMOS technology with different power supplies, i.e. 1.2, 1, and 0.9 V. Furthermore, a decrease in voltage level for logic ‘1’ and an increase in voltage level for logic ‘0’ is achieved while maintaining the logic threshold accordingly at half of the supply voltage. So, the output voltage swing is reduced and the unnecessary nodes of the pull down network get discharged in pre-charge phase, eventually leading to an improvement when compared with conventional design in overall PDP by 43.21 and 46.83% for two inverted two-input and three-input AND gate dynamic benchmarks, respectively, for a power supply of 1 V.
Starting Page	107
Ending Page	113
Page Count	7
ISSN	17518601
Volume Number	14
e-ISSN	1751861X
Issue Number	Issue 3, May (2020)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cdt/14/3
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cdt.2018.5045
Journal	IET Computers & Digital Techniques
Publisher Date	2020-01-14
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	90 Nm CMOS Technology Analogue Circuit Circuit For Digital Computers CMOS Integrated Circuit CMOS Logic Circuit Digital Cameras Digital Circuit Design, Modelling And Testing Dynamic CMOS Circuit Logic And Switching Circuit Logic Circuit Logic Design Method Logic Element Logic Gate Logic Threshold Low Power Electronics Low Power-delay-product Dynamic Complementary Metal Oxide Semiconductor Circuit Design Node-discharger Circuit Output Voltage Swing PDP Performance Analysis Portable Electronic Gadgets Power Electronics Power Supply Power Supply Circuit Size 90 Nm Supervisory Circuit Supervisory Control Signal Swing Domino Logic Twist-connected Transistors Voltage 0.9 V Voltage 1 V Voltage 1.2 V Voltage Level
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture Software

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