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| Content Provider | IET Digital Library |
|---|---|
| Author | Kang, Hyeong Ju Lee, Jong Yeol Kim, Ji Hoon |
| Abstract | A low-complexity twiddle factor generation structure for fast Fourier transform (FFT) is proposed. In FFT, twiddle faction generation and multiplication occupies more area than the other mathematical operations. The proposed structure reduces the twiddle factor generation part by removing the redundancies in the conventional structure and compressing the twiddle factor ROM contents. With the proposed structure, the twiddle factor generation part is reduced by 32–45% compared with that of the conventional structure. |
| Starting Page | 1443 |
| Ending Page | 1445 |
| Page Count | 3 |
| ISSN | 00135194 |
| Volume Number | 49 |
| e-ISSN | 1350911X |
| Issue Number | Issue 23, Nov (2013) |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/el/49/23 |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/el.2013.2461 |
| Journal | Electronics Letters |
| Access Restriction | Open |
| Rights Holder | © The Institution of Engineering and Technology |
| Subject Keyword | Fast Fourier Transform FFT Processor For Fast Fourier Transform Integral Transforms Low-complexity Twiddle Factor Generation Structure Memory Circuit Read-only Storage ROM Contents Semiconductor Storage Twiddle Faction Multiplication |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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