NDLI: Vertically symmetric broadband lumped element CMOS directional coupler

Content Provider	IET Digital Library
Author	Doan, N. T. Yoon, S. W.
Abstract	A vertically symmetric lumped element directional coupler (VSLEDC) providing broadband characteristics is proposed. In simulations, the proposed VSLEDC showed a 43.8% broader bandwidth than a horizontally and vertically symmetric lumped element directional coupler under similar design conditions for the same insertion loss. The proposed coupler was implemented in a Global Foundry 130 nm CMOS technology. The overall chip size was 1300 µm × 850 µm. The coupling was designed to be −10 dB at 1 GHz. The S-parameter measurements showed an absolute bandwidth and a fractional bandwidth of 141.1 MHz and 14.11%, respectively. Within the bandwidth, the insertion loss was 1.6‒1.8 dB.
Starting Page	1372
Ending Page	1373
Page Count	2
ISSN	00135194
Volume Number	54
e-ISSN	1350911X
Issue Number	Issue 24, Nov (2018)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/el/54/24
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/el.2018.6923
Journal	Electronics Letters
Publisher Date	2018-10-23
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Bandwidth 141.1 MHz Broadband Characteristic CMOS Integrated Circuit Design Condition Directional Couplers Frequency 1.0 GHz Global Foundry CMOS Technology Horizontally Symmetric Lumped Element Directional Coupler Insertion Loss Loss 1.6 DB to 1.8 DB Lumped Element CMOS Directional Coupler Lumped Parameter Network Microwave IC S Parameter S-parameter Measurement Size 130 Nm UHF Couplers UHF Integrated Circuit Vertically Symmetric Broadband Lumped Element CMOS Directional Coupler VSLEDC Waveguide And Microwave Transmission Line Component
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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