NDLI: Time-interleaved sample clock generator for ultrasound beamformer application

Content Provider	IEEE Xplore Digital Library
Author	Jae-Hwan Kim Ji-Yong Um Jae-Yoon Sim Hong-June Park
Copyright Year	2011
Description	Author affiliation: Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea (Ji-Yong Um; Jae-Yoon Sim) \|\| WCU (Division of IT Convergence Engineering), Pohang University of Science and Technology (POSTECH), Pohang, Korea (Jae-Hwan Kim; Hong-June Park)
Abstract	A sample clock generator (SCG) for application in a 32-channel ultrasound receiver beamformer is proposed. The RX beamformer samples the echo signals at delayed timings to align them in the time domain before summing them. The proposed SCG employs a dual counter and comparator scheme to generate delayed sampling clocks with 4.17 ns delay control resolution. The SCG is implemented using Verilog RTL code and the analog block of the beamformer was modeled with ideal sample and hold circuits. The beamformer was simulated using a mixed-signal simulator and the results verify the feasibility of the proposed scheme.
Starting Page	290
Ending Page	293
File Size	739370
Page Count	4
File Format	PDF
ISBN	9781457707094
e-ISBN	9781457707117
e-ISBN	9781457707100
DOI	10.1109/ISOCC.2011.6138767
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-11-17
Publisher Place	Korea (South)
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	beamformer sample clock generator time-interleaved ultrasound
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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