NDLI: Nanostructured silicon photonics devices fabricated by CMOS-compatible process

Content Provider	IEEE Xplore Digital Library
Author	Baba, T.
Copyright Year	2012
Description	Author affiliation: Department of Electrical and Computer Engineering, Yokohama National University, Japan (Baba, T.)
Abstract	Photonic nanostructures have been studied toward strong control of light emission and propagation as well as large-scale photonic integration on a chip. One of the attractive functions available with these structures is generating slow light. It flexibly changes the group velocity and delay of light, and also enhances light-matter interactions. A recent important progress in this field is that now these structures can be fabricated by using CMOS-compatible process. It enables multilayer mask process, large scale integration and sophisticated functionality. This talk will present on-chip tunable delay lines and tunable dispersion compensators, both of which are electrically controllable, nonlinear-based ultrafast delay tuning applicable to retiming of fast optical signals, on-chip optical correlator with a fast delay scanner, symbol-rate-variable DQPSK coherent receiver, efficient two-photon-absorption photo-diodes and fast and very compact MZ modulators.
Starting Page	1
Ending Page	5
File Size	2390330
Page Count	5
File Format	PDF
ISBN	9781467325134
e-ISBN	9781467325165
DOI	10.1109/PGC.2012.6458120
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-12-13
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	TV Chirp Heating slow light Modulation CMOS process photonic crystal CMOS integrated circuits silicon photonics Photonics
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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