NDLI: Novel I/O-bump design and optimization for chip-package codesign

Content Provider	IEEE Xplore Digital Library
Author	Ren-Jie Lee Hung-Ming Chen
Copyright Year	2009
Description	Author affiliation: Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan (Ren-Jie Lee; Hung-Ming Chen)
Abstract	While the advanced very large scale integration (VLSI) circuit is scaling to deep-submicrometer (DSM) technology, the I/O placement plays a key role in affecting the die size and interconnect. The flip-chip area-array ICs meet the requirements of higher I/O density and lower parasitic effects, but essentially need the optimized I/O and bump placement. In this paper we skip the redistribution layer (RDL) routing and design the specific I/O-bump tiles based on an innovative I/O-row scheme. By considering the package ball location, our proposed I/O-bump planning methodologies produce a package-aware I/O-bump location for chip-level core cell placement and package-level routing task. Thus, our algorithms provide the concurrent chip-package coplanning/codesign flow and dramatically speed up the design process. The experimental results show that our methods optimize the performance metrics in designing the interface between chip and package, such as the net crossing, total wirelength and length deviation.
Starting Page	1
Ending Page	4
File Size	6955747
Page Count	4
File Format	PDF
ISBN	9781424453504
DOI	10.1109/EDAPS.2009.5404007
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-12-02
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Measurement Tiles Process planning Circuits Packaging Very large scale integration Routing Technology planning Design optimization
Content Type	Text
Resource Type	Article

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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