NDLI: High power efficiency, 8 V∼20 V input range DC-DC buck converter with phase-locked loop

Content Provider	IEEE Xplore Digital Library
Author	Hong Jin Kim Hyung-gu Park Jae-hyung Jang Young-Jun Park YoungGun Pu Kang-Yoon Lee
Copyright Year	2015
Description	Author affiliation: Coll. of Inf. & Commun., Sungkyunkwan Univ., Suwon, South Korea (Hong Jin Kim; Hyung-gu Park; Jae-hyung Jang; Young-Jun Park; YoungGun Pu; Kang-Yoon Lee)
Abstract	This paper presents a DC-DC buck converter with Phase-Locked Loop (PLL) to generate the constant switching frequency regardless of Process, Voltage, Temperature (PVT) variations. When the input range is from 8 V to 20 V, the proposed DC-DC buck converter with PLL is implemented to have over 90% efficiency in heavy load current of 1.0 A. also to reduce the size of the external device while maintaining high efficiency, 2 MHz switching frequency and 2.2 μH inductance were used. The proposed DC-DC buck converter with PLL to generate constant frequency to compensate for the efficiency variation. As a result, the efficiency variation is less than 1%. This chip was fabricated using 0.18 μm BCD technology, and the area is 3.96 $mm^{2}.$ The maximum efficiency of proposed DC-DC buck converter with PLL is 92.53%.
Starting Page	1772
Ending Page	1777
File Size	876188
Page Count	6
File Format	PDF
ISBN	9788957082546
ISSN	21506086
DOI	10.1109/ICPE.2015.7168018
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-01
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	Korean Institute of Power Electronics
Subject Keyword	Phase Locked Loop Switching frequency Frequency Mode DC-DC buck converter High efficiency PWM Pulse width modulation Logic gates Frequency conversion Generators Phase locked loops Frequency control
Content Type	Text
Resource Type	Article

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