NDLI: Multiple-output MEMS DC/DC converter

Content Provider	IEEE Xplore Digital Library
Author	Chaehoi, A. Begbie, M. Weiland, D. Scherner, S.
Copyright Year	2011
Description	Author affiliation: Institute for System Level Integration, Heriot Watt University Research Park, Research Avenue North, EH14 4AP Edinburgh, Scotland, UK (Chaehoi, A.; Begbie, M.; Weiland, D.; Scherner, S.)
Abstract	DC/DC converters are widely used in consumer electronic devices where usually a single power source is available while the electronic board of the device requires different voltage levels in order to power-up different block functions. In this paper we present the design of a MEMS single-input multi-output voltage level shifter. The low-voltage to high-voltage conversion is based on the electrostatic transduction of variable capacitors built using interdigitated comb fingers. A 1mm2 MEMS prototype has been designed and fabricated using the SOIMUMPs process. In this study we present the co-design and co-simulation of the whole system (the MEMS device and its dedicated charge-pump-circuit) in a single EDA environment through MEMS+ [a Coventorware® tool that allows the co-simulation of MEMS and electronics in the Cadence Analog Design Environment]. We present analytical, FEM and MEMS+ models of the multi-output DC-DC converter and show that all our models converge towards the experimental results.
Starting Page	253
Ending Page	257
File Size	726277
Page Count	5
File Format	PDF
ISBN	9781612849058
e-ISBN	9782355000157
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-05-11
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	CMP
Subject Keyword	Micromechanical devices co-design Fingers Capacitors multi-output DC/DC converter Resonant frequency Rotors DC-DC power converters Stators MEMS co-simulation
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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