NDLI: T4G: media processor including 3D graphics for mobile set based on configurable processor

Content Provider	IEEE Xplore Digital Library
Author	Takemoto, T. Takenaka, Y. Minagawa, T. Koizumi, T. Ushijima, Y. Yanagida, N. Ohara, Y. Tanaka, K. Fujita, Y.
Copyright Year	2004
Description	Author affiliation: PC & Digital Consumer Syst. LSI Dept., Toshiba Corp., Kanagawa, Japan (Takemoto, T.; Takenaka, Y.; Minagawa, T.; Koizumi, T.; Ushijima, Y.; Yanagida, N.)
Abstract	A media processor, "T4G", for mobile set is described. 3.5M polygon/sec 3D Graphic engine, 15fps@QVGA MPEG4 codec engine, 2M pixel JPEG codec engine and 20Mbit DRAM are integrated into a single chip with peripheral modules such as Camera I/F and LCDC. The 3D graphics engine was designed based on a Toshiba's configurable processor MeP (Media embedded Processor) to achieve high throughput 3D graphics processing and flexibility. An embedded DRAM provide ultra high memory bandwidth to the 3D graphics engine up to 2Gbyte/sec. This chip is fabricated using 0.13/spl mu/m CMOS technology and integrates 20M transistors and 20Mbit DRAM. It operates at 125MHz and consumes maximum 170mW during 3D graphics operation.
Sponsorship	IEEE Solid-State Circuit Soc. IEEE SSCS Region 10 Chapters
Starting Page	156
Ending Page	159
File Size	324132
Page Count	4
File Format	PDF
ISBN	078038637X
DOI	10.1109/APASIC.2004.1349436
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-08-05
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Graphics Codecs Costs Random access memory Throughput Large scale integration Mobile handsets Hardware Engines MPEG 4 Standard
Content Type	Text
Resource Type	Article

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