NDLI: Towards a Better Cache Utilization Using Controlled Cache Partitioning

Content Provider	IEEE Xplore Digital Library
Author	Halwe, P.D. Das, S. Kapoor, H.K.
Copyright Year	2013
Description	Author affiliation: Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Guwahati, Guwahati, India (Halwe, P.D.; Das, S.; Kapoor, H.K.)
Abstract	Many multi-core processors nowadays employ a shared Last Level Cache (LLC). Partitioning LLC becomes more important as LLC is shared among the cores. Past research has demonstrated that the traditional least recently used (LRU) based partitioning cum replacement policy has adverse effects on parameters like instruction per cycle (IPC), miss rate and speedup. This leads to poor performance in an environment when multiple cores compete for one global LLC. Applications, enjoying locality of reference are purely benefited by LRU, however LRU fails for the applications showing working set size (WSS) large than the LLC size. In this work, we propose a scheme which allows cores to steal/donate their lines upto a threshold and give them a chance to adjust their partition when there is a miss. Instead of maintaining strict target partitioning, we introduce a flexible threshold window. Our evaluation with multiprogrammed workloads shows significant performance improvement.
Starting Page	179
Ending Page	186
File Size	505524
Page Count	8
File Format	PDF
e-ISBN	9781479933815
DOI	10.1109/DASC.2013.59
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-12-21
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	NUCA Program processors LLC Working Set Size Multicore processing Cache Partitioning CMP Benchmark testing Throughput Cache storage Partitioning algorithms Monitoring
Content Type	Text
Resource Type	Article

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