NDLI: A 0.35 µm CMOS LC-tank injection-locked frequency divider

Content Provider	IEEE Xplore Digital Library
Author	Chtioui, T. Ben Issa, D. Fakhfakh, A. Samet, M.
Copyright Year	2010
Description	Author affiliation: Laboratory of electronics and Technologies of information (LETI), National engineering school of Sfax, Tunisia (Chtioui, T.; Ben Issa, D.; Fakhfakh, A.; Samet, M.)
Abstract	A divide-by-2 injection-locked frequency divider (ILFD) has been designed in a 0.35 µm CMOS process. The ILFD circuit is realized with a differential CMOS LC-tank oscillator with an injection MOS. Simulation results show that at the supply voltage of 2.5 V and by tuning Vtune from 0 to 2.5 V, the tuning range of the free-running ILFD is from 1.84 to 2.89 GHz. At the injection signal power of 0 dBm, the locking range of the proposed ILFD is about 2.49 GHz from the incident frequency 3.53 to 6.02 GHz. The ILFD dissipate 3.43 mW. At the tuning voltage of 1.6 V the simulated phase noise of the free running ILFD is −125.6 dBc/Hz at 1.066 MHz offset frequency at 2.65 GHz and the phase noise of the locked output is −132.7 dBc/Hz while the phase noise of the injected signal is −126.7 dBc/Hz.
Starting Page	1
Ending Page	5
File Size	382326
Page Count	5
File Format	PDF
ISBN	9781424463381
e-ISBN	9781424463404
DOI	10.1109/DTIS.2010.5487603
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-03-23
Publisher Place	Tunisia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Phase noise Energy consumption Circuit topology Circuit optimization Injection-locked oscillators Voltage-controlled oscillators Frequency conversion CMOS process Logic Tuning
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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