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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Joseph, M. |
| Copyright Year | 2007 |
| Description | Author affiliation: Tata Consultancy Services, Mumbai (Joseph, M.) |
| Abstract | Summary form only given. From the earliest days, designers of real-time systems have had to decide how to manage the hardware-level mechanisms (such as interrupts and multi-level priorities) that have been provided to share the computing resources between competing demands. One approach is to ignore these mechanisms and use software techniques to schedule program segments; another is to align the software architecture with the hardware features, e.g. by dividing a program into tasks or processes that are scheduled dynamically according to hardware priorities. These are two of many possible engineering solutions to the problem of meeting the timing constraints of real-time programs. Looked at more formally, the problem is to prove that the implementation of the program, by whatever method is chosen, can be shown to satisfy its timing specifications. This is altogether harder to accomplish. Proofs at the program level require guarantees of timing properties at lower levels. |
| Starting Page | 22 |
| Ending Page | 22 |
| File Size | 127068 |
| Page Count | 1 |
| File Format | |
| ISBN | 9780769528564 |
| DOI | 10.1109/TASE.2007.8 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-06-06 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Real time systems Computer science Processor scheduling Software architecture Dynamic scheduling Control systems Hardware Timing Resource management |
| Content Type | Text |
| Resource Type | Article |
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