NDLI: Quick response circuit for low-power LDO voltage regulators to improve load transient response

Content Provider	IEEE Xplore Digital Library
Author	Heng, S. Cong-Kha Pham
Copyright Year	2007
Description	Author affiliation: Univ. of Electro-Commun., Chofu (Heng, S.; Cong-Kha Pham)
Abstract	In this work, we propose a quick response circuit to improve the load transient response of fully low dropout voltage linear regulator (LDO) which is operable with a very low power consumption. Simulating by HSPICE with 0.35 mum CMOS technology shows that we can achieve the transient responses with less transient overshoot or undershoot when driving large current loads. Comparing to the generic LDO, for example, in case of 1 muF decoupling capacitor, about 95% output drop and 27% settling time for 0.1 mA to 100 mA load current and 88% output overshoot and 63% settling time for 100 mA to 0.1 mA load current have been together improved. The proposed circuit only dissipates low static power, so we could achieve the above LDO with only 3.3 muA consuming current at V out + 1 V and 150 mA load current. V out is the output voltage of the regulator.
Starting Page	28
Ending Page	33
File Size	486963
Page Count	6
File Format	PDF
ISBN	9781424409761
DOI	10.1109/ISCIT.2007.4391979
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-10-17
Publisher Place	Australia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Transient response Energy consumption Regulators Power supplies Voltage MOSFET circuits Boosting CMOS technology Power MOSFET Personal digital assistants
Content Type	Text
Resource Type	Article

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