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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Xiao Yang Guican Chen Jun Cheng Hong Zhang |
| Copyright Year | 2007 |
| Description | Author affiliation: Xi'an Jiaotong Univ., Xi'an (Xiao Yang; Guican Chen; Jun Cheng; Hong Zhang) |
| Abstract | In this paper, a novel 2-3 two-stage fifth-order multi-bit cascade sigma-delta modulator (SDM) architecture is proposed for broadband applications. For low oversampling applications, in order to resolve the problem of the sensitivity to the nonlinear and finite gain of operational amplifier (op-amp) in the traditional cascade SDM architecture, the first stage of the proposed SDM architecture employs a second-order low-distortion multi-bit SDM. While the second stage employs a single-loop third-order multi-bit SDM instead of a first-order or second-order SDM, which can simplify the analog circuit significantly. The noise transfer function and the interstage gain between the first stage and second stage are carefully designed for stability considerations. Furthermore, the simplified digital cancellation logics can be achieved. Simulation results show that this SDM architecture is insensitive to the nonlinear and finite gain of op-amp. |
| Starting Page | 101 |
| Ending Page | 105 |
| File Size | 270083 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781424409761 |
| DOI | 10.1109/ISCIT.2007.4391993 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-10-17 |
| Publisher Place | Australia |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Operational amplifiers Broadband amplifiers Circuit simulation Transfer functions Analog circuits Delta-sigma modulation Noise cancellation Circuit noise Circuit stability Logic |
| Content Type | Text |
| Resource Type | Article |
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