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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Kian Ann Ng Yong Ping Xu |
| Copyright Year | 2012 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore (Kian Ann Ng; Yong Ping Xu) |
| Abstract | This paper presents a compact and low input capacitance neural recording amplifier. By replacing a single feedback capacitor with a clamped T-capacitor network, the proposed amplifier can achieve same mid-band gain with less input capacitance, resulting in a smaller silicon area and higher input impedance. Fabricated in 0.35μm CMOS, the amplifier occupies merely $0.056mm^{2}.$ It achieves 38.1-dB mid-band gain with 1.6pF input capacitance, and hence has a $C_{in}/Gain$ ratio of 20fF.V/V. It has an input referred noise of $6.72μV_{rms}$ over 8.4-kHz bandwidth and NEF of 4, and consumes 6μW. In-vivo recordings from an animal experiment are also demonstrated. |
| Sponsorship | Circuits & Syst. Soc. |
| Starting Page | 328 |
| Ending Page | 331 |
| File Size | 754084 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781467322911 |
| e-ISBN | 9781467322935 |
| e-ISBN | 9781467322928 |
| DOI | 10.1109/BioCAS.2012.6418430 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-11-28 |
| Publisher Place | Taiwan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Noise Capacitors Bandwidth Logic gates Capacitance Silicon Impedance |
| Content Type | Text |
| Resource Type | Article |
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