NDLI: Broadband, highly integrated receiver frontend up to 67 GHz

Content Provider	IEEE Xplore Digital Library
Author	Sterns, M. Rehner, R. Schneiderbanger, D. Martius, S. Schmidt, L.
Copyright Year	2011
Description	Author affiliation: Chair for High Frequency Technology, University of Erlangen-Nuremberg, Cauerstr. 9, D-91058 Erlangen, Germany (Sterns, M.; Rehner, R.; Schneiderbanger, D.; Martius, S.; Schmidt, L.)
Abstract	In this paper a novel concept for the realization of a highly integrated receiver frontend is presented. The frontend consists of a forward coupler to split the low frequency path (0–43 GHz) and the high frequency path (43–67 GHz), a mixer for the down conversion of the high frequency input signal and a magnetically tunable filter to achieve a high supression (>60 dBc) of the image frequency and all other higher order intermodulation products emerging in a non ideal mixer. The combination of the mixer and the tunable filter, both realized in finline technology, and a forward coupler based on microstrip lines allows for assembling a receiver frontend without any substrate interconnects in the high frequency path. This makes it possible to circumvent reflection losses caused by such interconnects thus achieving a conversion loss of the complete frontend of less than 17.9 dB in the frequency range from 43 to 67 GHz. By taking advantage of the cutoff-frequency of the used finline circuits a suppression of more than 60 dBc of the image frequency and all the other spurious mixer responses can be guaranteed.
Starting Page	624
Ending Page	627
File Size	383641
Page Count	4
File Format	PDF
ISBN	9781612842363
e-ISBN	9782874870231
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-10-10
Publisher Place	United Kingdom
Access Restriction	Subscribed
Rights Holder	EUROPEAN MICROWAVE ASSOC
Subject Keyword	Slotline Magnetic separation Couplers Receivers Insertion loss Broadband communication Mixers
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Broadband, highly integrated receiver frontend up to 67 GHz

Design of broadband, highly integrated, 20-30 GHz and 35-45 GHz MMIC up-converters

Design of broadband, highly integrated, 20-30 GHz and 35-45 GHz MMIC up-converters

A broadband 440–590 GHz receiver

Design and application of the orthogonal feature of TE10 mode and slotline mode in substrate integrated hybrid multichannel signaling systems

A dual-band 61.4∼63GHz/75.5∼77.5GHz CMOS receiver in a 90nm technology

A low-power 2.4-GHz receiver for wireless implantable neural stimulators

A broadband receiver protection limiter for FET based integrated circuits

Highly Integrated E-Band Direct Conversion Receiver

Broadband, highly integrated receiver frontend up to 67 GHz

Similar Documents

Broadband, highly integrated receiver frontend up to 67 GHz

Design of broadband, highly integrated, 20-30 GHz and 35-45 GHz MMIC up-converters

Design of broadband, highly integrated, 20-30 GHz and 35-45 GHz MMIC up-converters

A broadband 440–590 GHz receiver

Design and application of the orthogonal feature of TE10 mode and slotline mode in substrate integrated hybrid multichannel signaling systems

A dual-band 61.4∼63GHz/75.5∼77.5GHz CMOS receiver in a 90nm technology

A low-power 2.4-GHz receiver for wireless implantable neural stimulators

A broadband receiver protection limiter for FET based integrated circuits

Highly Integrated E-Band Direct Conversion Receiver

Broadband, highly integrated receiver frontend up to 67 GHz