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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Desogus, M. Reorda, M.S. Sterpone, L. Avantaggiati, V.A. Audisio, G. Sabatini, M. |
| Copyright Year | 2013 |
| Description | Author affiliation: Pirelli Tyre S.p.A., Milan, Italy (Audisio, G.; Sabatini, M.) || Dipt. di Autom. e Inf., Politec. di Torino, Turin, Italy (Desogus, M.; Reorda, M.S.; Sterpone, L.) || Studio Ing. dei Sist. Milano, Milan, Italy (Avantaggiati, V.A.) |
| Abstract | Due to the growing complexity of automotive systems, including various modules (e.g., microcontrollers, DSPs, memories and IP cores), validation and debug have become increasingly complex, with consequent impact on time-to-market and quality. In this paper we propose a novel flow for hardware and software validation and debug through the use of an FPGA-based emulation platform, which provides a valuable support for these important phases of the development flow. The same emulation platform is also able to support faults injection in the device under validation. Fault injection is intended not only to provide an evaluation of the system fault tolerance, but also to support the debug of the embedded fault tolerance mechanisms. Experimental results on a real industrial case study allow to evaluate the effectiveness and costs of the proposed solution. |
| Sponsorship | IEEE |
| Starting Page | 1 |
| Ending Page | 6 |
| File Size | 2505741 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781479935253 |
| DOI | 10.1109/IDT.2013.6727076 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-12-16 |
| Publisher Place | Morocco |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Embedded System SoC FPGA Validation Debug |
| Content Type | Text |
| Resource Type | Article |
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