NDLI: FPGA Implementation of High Speed FFT Algorithm Based on Split-Radix

Content Provider	IEEE Xplore Digital Library
Author	Xu Peng Chen Jin Shu
Copyright Year	2008
Description	Author affiliation: Dept. of Electron. & Eng., Tsinghua Univ., Beijing (Xu Peng; Chen Jin Shu)
Abstract	Fast Fourier transform (FFT) is the collection of algorithms that performed the discrete Fourier transform (DFT). As a medium to perform the transform from time domain to frequency domain, FFT is widely used as an indispensible tool in signal processing applications. Split-radix algorithm is an appropriate algorithm for the implementation of FFT among all the effective algorithms of FFT. At the requirement of high speed, an algorithm that is best for high speed implementation is to be found. After researching all the relative algorithms, split-radix algorithm is chosen as the basic algorithm. In this paper, parallel processing and pipeline techniques are employed and proved to be a well-performed method. The proposed method performs well in the implementation of FPGA and satisfies the requirement of high speed. Results show the system latency of 13 clock periods and high efficiency in conserving hardware resources. The method put forward in this paper is extensible and can be applied to various applications.
Starting Page	781
Ending Page	784
File Size	245888
Page Count	4
File Format	PDF
ISBN	9780769535050
DOI	10.1109/IITA.Workshops.2008.210
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-12-21
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Discrete Fourier transforms Pipelines parallel processing Frequency domain analysis Delay pipeline Discrete transforms Fast Fourier transforms FFT Signal processing algorithms Parallel processing split-radix Field programmable gate arrays Clocks
Content Type	Text
Resource Type	Article

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