NDLI: Testing CPU based boards for functionality using bus cycle signature system

Content Provider	IEEE Xplore Digital Library
Author	Sabapathi, S.R.
Copyright Year	1998
Description	Author affiliation: Qmax Technol. Pte Ltd., Singapore (Sabapathi, S.R.)
Abstract	This paper presents a new and novel technique of employing a Bus Cycle Signature System in cost effective testing and diagnostics of CPU based boards. The system controls the board under test using a single reset line. A CPU specific hardware interface unit generates strobe signals during active bus cycles. During this time, the test nodes are strobed and the resultant bit stream is then compressed into a 16-bit signature word. The fault detection is achieved by comparing bus cycle signatures of the known good board to that of a board under test. The major plus point of the system is its ability to detect faults down to node level with a fault coverage of over 95% in the CPU kernel, without having to write complex time consuming test programs.
Starting Page	165
Ending Page	171
File Size	531526
Page Count	7
File Format	PDF
ISBN	0818682779
ISSN	10817735
DOI	10.1109/ATS.1998.741609
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-12-02
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System testing Read only memory Integrated circuit testing Pins Power generation economics Costs Hardware Kernel Automatic testing Read-write memory
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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