NDLI: Composing data-driven circuits using handshake in the clock-synchronous domain

Content Provider	IEEE Xplore Digital Library
Author	Sykora, J.
Copyright Year	2013
Description	Author affiliation: Inst. of Inf. Theor. & Autom. (UTIA), Prague, Czech Republic (Sykora, J.)
Abstract	We present a technique for modelling and synthesis of fine-grained data-driven circuits in the clock-synchronous hardware, such as the field programmable gate arrays (FPGA), called the Flow-Transfer Level (FTL). The distinguishing property of the FTL technique is that it does not rely on FIFO queues to handle flow synchronization between the components (called operators). The communication channels, called pipes, employ conceptually a two-state handshake protocol. The handshake behaviour of each operator is defined logically using dependency subgraphs that are symmetrical for producers and consumers. The original data-flow netlist of operators is transformed into a global control dependency graph. Cycles in dependency graphs are allowed as long as they do not constitute real data dependencies but only dependencies in promises of handshake completions. A method is given that recursively eliminates these cycles. We demonstrate the feasibility of the approach in a prototype compiler that transforms an FTL netlist into a synthesizable VHDL code. A comparison to a manual RTL VHDL design shows that our technique is very lightweight, yet it has a potential of increasing the design abstraction level.
Sponsorship	IEEE Comput. Soc.
Starting Page	211
Ending Page	214
File Size	203803
Page Count	4
File Format	PDF
ISBN	9781467361354
e-ISBN	9781467361361
e-ISBN	9781467361347
DOI	10.1109/DDECS.2013.6549818
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-04-08
Publisher Place	Czech Republic
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Pipelines Vectors Clocks Field programmable gate arrays Protocols Registers Synchronization
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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