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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chatterjee, A. |
| Copyright Year | 2009 |
| Description | Author affiliation: Georgia Institute of Technology, 777 Atlantic Drive NW, Atlanta, USA (Chatterjee, A.) |
| Abstract | CMOS technology scaling along with the resulting large variability of circuit performance has made post-silicon circuit and algorithmic level built-in test and adaptation/tuning almost a necessity for deeply scaled technologies. Currently, circuits are designed to tolerate worst-case process corners. In addition, circuits as well as demodulation/signal processing algorithms must be designed for worst case operating conditions (e.g. environmental noise). This forces designers to excessively guard band their circuits while using “aggressive” back-end algorithms to support the end application, resulting in unacceptable power-performance-yield tradeoffs. One way to tackle this problem is to design circuits and relevant signal processing algorithms that are cognitive of their environmental operating conditions and manufacturing process conditions and use this cognition to perform self-adaptation that conserves power while maximizing yield and reliability. Such self-adaptation involves incorporation of built-in test, diagnosis and tuning/adaptation mechanisms into the circuits and systems concerned. A key issue is that of test, diagnosis and tuning of complex circuit and system-level parameters that must be evaluated and traded off against one another during the adaptation process without access to complex external test instrumentation. This talk summarizes recent results obtained in the design of such cognitive computing and communication systems and points to directions for future work in this area. |
| Starting Page | 2 |
| Ending Page | 2 |
| File Size | 83333 |
| Page Count | 1 |
| File Format | |
| ISBN | 9781424433414 |
| DOI | 10.1109/DDECS.2009.5012085 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-04-15 |
| Publisher Place | Czech Republic |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Automatic testing System testing Communication system control Control systems Circuit testing Circuit optimization Signal processing algorithms CMOS technology Algorithm design and analysis Built-in self-test |
| Content Type | Text |
| Resource Type | Article |
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