NDLI: Design of current-mode digital-to-analog converter in hybrid architecture

Content Provider	IEEE Xplore Digital Library
Author	Chuen-Yau Chen Chi-Jung Cheng Chien-Cheng Yu
Copyright Year	2005
Description	Author affiliation: Dept. of Electr. Eng., Nat. Yunlin Univ. of Sci. & Technol., Taiwan (Chuen-Yau Chen; Chi-Jung Cheng)
Abstract	This paper proposed a current-mode digital-to-analog converter with a high resolution, high speed, and small hardware overhead. This design takes advantage of the weighted-current-steering approach and the R-/spl beta/R-ladder approach. The weighted-current-steering approach is used to implement the seven bits in the most-significant-bit stage while the R-/spl beta/R-ladder approach that is modified form the R-/spl beta/R approach is used to implement the nine bits in the least-significant-bit stage. This converter was designed with a TSMC 0.18-/spl mu/m 1P6M CMOS process. The HSPICE simulation results show that this design achieves a 16-b resolution with DNL and INL less than 0.5 LSB and 0.7 LSB, respectively. At 3.3-V supply voltage and 200-MHz operating frequency, the power consumption is 232 mW.
Starting Page	231
Ending Page	234
File Size	344769
Page Count	4
File Format	PDF
ISBN	0780389344
DOI	10.1109/NEWCAS.2005.1496715
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-06-22
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Switches Hardware Signal processing Voltage Energy consumption Digital signal processing Digital-analog conversion Decoding CMOS process Signal resolution
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in