NDLI: Trace algorithms for deeply integrated complex and hybrid SoCs

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2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)

2014 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)

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2012 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)

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2010 NASA/ESA Conference on Adaptive Hardware and Systems

2009 NASA/ESA Conference on Adaptive Hardware and Systems

2008 NASA/ESA Conference on Adaptive Hardware and Systems

Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)

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Characterising Wireless Sensor Motes for Space Applications

Mixtrinsic Multi-Objective Reconfiguration of Evolvable Sensor Electronics

Data Requirements from Evolvable Sensor Networks for Homeland Security Problems

Following the Footsteps of Others: Techniques for Automatic Shoeprint Classification

Ensuring data integrity via ICmetrics based security infrastructure

Improving Key Distribution forWireless Sensor Networks

Multiresolution Hybrid Approaches for Automated Face Recognition

Normalizing Discrete Circuit Features with Statistically Independent values for incorporation within a highly Secure Encryption System

AES Embedded Hardware Implementation

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A New Reconfigurable Coarse-Grain Architecture for Multimedia Applications

A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm

H.264/AVC In-Loop De-Blocking Filter Targeting a Dynamically Reconfigurable Instruction Cell Based Architecture

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A Configurable IP for Mode Decision of H.264/AVC Encoder

Adaptive Segmentation Technique For Object-Base MPEG-4 System

Systolic Array Based Architecture for Variable Block-Size Motion Estimation

System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design

A Configurable FIR Filter Scheme based on an Adaptive Multilayer Network Structure

Investigation of Reconfigurability for the Digital Backend of Ultra Wideband Receiver

High Performance Embedded Reconfigurable Concatenated Convolution- Puncturing Fabric for 802.16

Debug Support for Hybrid SoCs

A Novel Sampling Scheme for Efficient Analog to Digital Conversion

Analytical Modelling for Adaptive Multi-Purpose On-Chip Optical Interconnect

DWT Based Adaptive Threshold Determination in Embolic Signal Detection

Predictive Analysis for Robust Operation with Applications to Autonomous Biosensors

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Facial Image Associative Memory Model

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An Adaptive Fault-Tolerant Memory System for FPGA-based Architectures in the Space Environment

Enhancements of reconfigurable System-on-Chip Data Processing Units for Space Application

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Programming an FPGA-based Super Computer Using a C-to-VHDL Compiler: DIME-C

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A New Behavioural Power Modelling Approach for FPGA based Custom Cores

A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems

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A Multi-object GA Based Physical Placement Algorithm for Heterogeneous Dynamicaly Reconfigurable Arrays

Solving the even-n-parity problems using Best SubTree Genetic Programming

A Hybrid Engine for the Placement of Domain-Specific Reconfigurable Arrays

Self-Reconfigurable Analog Arrays: Off-The Shelf Adaptive Electronics for Space Applications

An On-Chip Adaptive Spike Timing Based Offset Cancellation Scheme for Neuromorphic Sensing

On the Design of a Reconfigurable OTA-C Filter for Software Radio

A field programmable Gm-C filter array (FPAA) for online adaptation to environmental changes.

Programmable Analog VLSI Architecture Based upon Event Coding

A Population-oriented Architecture for Particle Swarms

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PERPLEXUS: Pervasive Computing Framework for Modeling Complex Virtually-Unbounded Systems

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The Perplexus bio-inspired reconfigurable circuit

Multiagent approach to the distributed autonomous explorations

An RLDRAM II Implementation of a 10Gbps Shared Packet Buffer for Network Processing

FPGA-Based Lookup Circuit for Session-Based IP Packet Classification

High-Speed IP Address Lookups Using Hardware Based Tree Structures

Novel Content Addressable Memory Architecture for Adaptive Systems

Trace algorithms for deeply integrated complex and hybrid SoCs

TRICODA - Complex Data Analysis and Condition Monitoring based onv Neural Network Model

An embedded sensor validation system for adaptive condition monitoring of a wind farms

ALT-DVS: Dynamic Voltage Scaling with Awareness of Leakage and Temperature for Real-Time Systems

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Automatic Synthesis of Fault Detection Modules for Mobile Robots

Using Relocatable Bitstreams for Fault Tolerance

Fault-recovery Non-FPGA-based Adaptable Computing System Design

Hierarchical Built-in Self-testing and FPGA Based Healing Methodology for System-on-a-Chip

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First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06)

Trace algorithms for deeply integrated complex and hybrid SoCs

Content Provider	IEEE Xplore Digital Library
Author	Hopkins, A.B.T. McDonald-Maier, K.D.
Copyright Year	2007
Description	Author affiliation: Univ. of Essex, Colchester (Hopkins, A.B.T.; McDonald-Maier, K.D.)
Abstract	Deeply integrated system-on-chips (SoCs) are now the de-facto solution in realizing the hard real-time control systems that underlay today's advanced products, and real-time tracing is the established means of debugging such systems. This manuscript reviews the techniques used by the leading trace solutions and presents empirical measurement results to evaluate their performance so that their suitability for next generation SoCs can be reliably assessed. Its findings are that current solutions are focused mainly on single processor devices and fail to provide sufficient bandwidth for multiple processor SoCs operating at higher peak clock frequencies. To support these new higher performance devices, novel techniques are required that boost performance; the practicality of more radical developments in this area are discussed.
Starting Page	641
Ending Page	646
File Size	420383
Page Count	6
File Format	PDF
ISBN	9780769528663
DOI	10.1109/AHS.2007.106
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-08-05
Publisher Place	UK
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	NASA Adaptive systems Hardware
Content Type	Text
Resource Type	Article

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