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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jian-Yu Hsieh Shuenn-Yuh Lee |
| Copyright Year | 2007 |
| Description | Author affiliation: Nat. Chung-Cheng Univ., Ming-Hsiung (Jian-Yu Hsieh; Shuenn-Yuh Lee) |
| Abstract | This paper presents a new topology of variable gain even harmonic mixer (VGEHM) for IEEE 802.11 a, which includes a proposed NMOS double frequency circuit (DFC) and a PMOS active load (AL) topology. The proposed NMOS DFC can immunize the DC offset and increase isolation. The AL is used to increase gain and achieve wide-gain variation. In this paper, theoretical analyses of conversion gain and linearity have been described in detail. The proposed mixer is implemented in TSMC CMOS 0.18 mum process to evaluate its performance. The measured results, according to RF of 5.25 GHz and IF of 800 KHz, show the isolation of 57.35 dB between RF and LO, and the variable conversion gain between -28.02 dB and 6.21 dB. Meanwhile, the high linearity is also achieved by referring to input compression point $(IIP_{IdB})$ of -16 dBm, input second order intercept point (IIP2) of 17.66 dBm, input third order intercept point $(IIP_{3})$ of -3.945 dBm. Besides, low power dissipation of 7.2 mW without buffer for 1.8 V supply voltage is also achieved. |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 4027766 |
| Page Count | 4 |
| File Format | |
| ISBN | 1424405823 |
| DOI | 10.1109/VDAT.2007.372760 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-04-25 |
| Publisher Place | Taiwan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Harmonic analysis Circuit topology MOS devices Digital-to-frequency converters Linearity Radio frequency Mixers CMOS process Gain measurement Power dissipation AL IEEE 802.11aa VGEHM DFC |
| Content Type | Text |
| Resource Type | Article |
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