NDLI: High frequency package design technology using S parameter synthesize method

Content Provider	IEEE Xplore Digital Library
Author	Wada, H. Makihara, C. Park, C.
Copyright Year	1997
Description	Author affiliation: Kyocera Corp., Kagoshima, Japan (Wada, H.)
Abstract	Semiconductor technology has made significant advancements in the telecommunication market in the past few years. There are considerable and increasing demands for higher frequency application, such as for digital cellular phone systems, Personal Handy Phone System (PHS), wireless LAN systems and other mobile communication applications. Therefore, the synthesis of RF signals with low noise loss characteristics becomes important . The market requirements demands that the package or functional substrate also be smaller, has a lower cost and a higher performance. In order to satisfy these market demands, improvements in the size, electrical characteristics, reliability, and cost improvements for high frequency package design technology is necessary. Techniques using equivalent circuits have been popular in the design of high frequency circuits in the past. However, the applicable frequency band is very narrow and limited, particularly in the GHz frequency range. Modeling by equivalent circuits is very complicated, cumbersome, and too difficult to incorporate. Inevitably, the need for adjustment, which requires a large amount of time and labor, is very difficult to efficiently perform the high frequency circuit designs in the GHz range. Using S parameter techniques for high frequency range parameters synthesized in the several tens of giga hertz bands (microwave regions), a method has been developed which can predict the performance characteristics. This method can be applied as a basic design technique.
Starting Page	151
Ending Page	155
File Size	458761
Page Count	5
File Format	PDF
ISBN	0780341945
DOI	10.1109/WCC.1997.622268
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-08-11
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Frequency Scattering parameters Equivalent circuits Circuit synthesis Semiconductor device packaging Cellular phones Wireless LAN Mobile communication Signal synthesis Semiconductor device noise
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Accurate Package Modeling Based on S-Parameter Measurements

Modeling and simulation of IC and package power/ground network

Semiconductor packaging technology for mobile phones in Japan

High frequency electrical circuit model of chip-to-chip vertical via interconnection for 3-D chip stacking package

Chip package co-design of receiver front-end for 4G mobile phones

Electrical characterization of quad flat non-lead package for RFIC applications

Chip-package co-design for high performance and reliability off-chip communications

Small signal equivalent circuit of illuminated HPTs

Modeling and Parameter Extraction Methods of Bond-Wires for Chip-Package Co-Design

High frequency package design technology using S parameter synthesize method

Similar Documents

Accurate Package Modeling Based on S-Parameter Measurements

Modeling and simulation of IC and package power/ground network

Semiconductor packaging technology for mobile phones in Japan

High frequency electrical circuit model of chip-to-chip vertical via interconnection for 3-D chip stacking package

Chip package co-design of receiver front-end for 4G mobile phones

Electrical characterization of quad flat non-lead package for RFIC applications

Chip-package co-design for high performance and reliability off-chip communications

Small signal equivalent circuit of illuminated HPTs

Modeling and Parameter Extraction Methods of Bond-Wires for Chip-Package Co-Design

High frequency package design technology using S parameter synthesize method