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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ming-Hao Kuo Chung-Yen Chien Po-Hsiang Liao Wei-Ting Lai Pei-Wen Li |
| Copyright Year | 2015 |
| Description | Author affiliation: Dept. of Electr. Eng., Nat. Central Univ., Jhongli, Taiwan (Ming-Hao Kuo; Chung-Yen Chien; Po-Hsiang Liao; Wei-Ting Lai; Pei-Wen Li) |
| Abstract | We report a unique, CMOS approach for the inclusion of size-tunable (7-50-nm), spherical Ge quantum dots (QDs) into gate stacks of Si MOS transistors, through selective oxidation of SiGe pillars over the buffer layer of $Si_{3}N_{4}$ on top of the Si substrate. The Ge-QD MOS phototransistors feature extremely low dark current densities $(I_{off}$ ~ 0.27 $pA/μm^{2}),$ high $I_{on}/I_{off}$ $(>10^{6}),$ steep subthreshold swing (~175 mV/dec at 300 K), superior external quantum efficiency (~240%), and fast response time of 1.4ns under illumination of 850 nm, providing a core building block for high-performance Ge optical transducers for on-chip optical switches and transducers for Si-based optical interconnect applications. Most importantly, the detection wavelength of the Ge QD is tunable from near infrared to near ultraviolet by reducing the QD size from 50 to 7 nm, and the optimal photoresponsivity is tailored by the Ge QD size and the effective thickness of gate dielectrics. |
| Starting Page | 1 |
| Ending Page | 2 |
| File Size | 232233 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781479973750 |
| DOI | 10.1109/VLSI-TSA.2015.7117552 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-04-27 |
| Publisher Place | Taiwan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Phototransistors Silicon Logic gates Dielectrics Optical interconnections Oxidation Lighting |
| Content Type | Text |
| Resource Type | Article |
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