NDLI: The New Scaling Paradigm

Content Provider	IEEE Xplore Digital Library
Author	Gargini, P.A.
Copyright Year	2008
Abstract	The FET device will lead the Silicon Nanoelectronics era until at least the beginning of the third decade of the $21^{st}$ century by using the equivalent scaling approach. New process techniques like self-assembly will be required to augment the capabilities of the traditional evolution of top-down manufacturing techniques. Multiple materials will be introduced in the FET process and eventually all of the materials introduced in the 60's will be replaced, including possibly silicon itself. Thermal limitations will most likely represent the ultimate limitation of the FET device requiring the adoption of heterogeneous integration of multiple technologies on the same substrate as a way of achieving higher system performance. Devices using other quantum state variables have been proposed and an extensive and systematic evaluation program needs to be carried on in this decade in order to identify possible candidates in the next decade for manufacturing implementation beyond the year 2020. This new device will operate in conjunction with CMOS and other types of devices in a heterogeneous integration.
Starting Page	10
Ending Page	13
File Size	196748
Page Count	4
File Format	PDF
ISBN	9781424416141
ISSN	1524766X
DOI	10.1109/VTSA.2008.4530775
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-04-21
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electronics industry MOSFETs FETs Gold Aluminum MOS devices Silicides Dielectrics Electron tubes Application software
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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