NDLI: I fluctuations by stochastic single-hole trappings in high-κ dielectric p-MOSFETs

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I fluctuations by stochastic single-hole trappings in high-κ dielectric p-MOSFETs

Content Provider	IEEE Xplore Digital Library
Author	Kobayashi, S. Saitoh, M. Uchida, K.
Copyright Year	2008
Description	Author affiliation: Adv. LSI Technol. Lab., Toshiba Corp., Yokohama (Kobayashi, S.; Saitoh, M.; Uchida, K.)
Abstract	Random telegraph noise (RTN) in scaled FETs is one of the biggest concerns in the present and future LSIs. However, RTN in high-kappa gate dielectric FETs have not been fully studied yet. In this paper, we have studied RTN in high-kappa pFETs in comparison with that in $SiO_{2}$ pFETs. It is found for the first time that the reduction of the RTN amplitude $(DeltaI_{d}/I_{d})$ by the surface holes is smaller in high-kappa pFETs, comparing to the $SiO_{2}$ pFETs. It is also found that slower traps in the high-kappa gate dielectric more severely degrade $I_{d}.$ It is considered that some key characteristics are understandable in terms of the higher dielectric constant and the smaller barrier height of the high-kappa gate dielectric.
Starting Page	78
Ending Page	79
File Size	279442
Page Count	2
File Format	PDF
ISBN	9781424418022
DOI	10.1109/VLSIT.2008.4588569
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-06-17
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates FETs Dielectrics Silicon Fluctuations Noise Substrates
Content Type	Text
Resource Type	Article

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