NDLI: Intra-Task Dynamic Cache Reconfiguration

Content Provider	IEEE Xplore Digital Library
Author	Hajimiri, H. Mishra, P.
Copyright Year	2012
Abstract	Optimization techniques are widely used in embedded systems design to improve overall area, performance and energy requirements. Dynamic cache reconfiguration (DCR) is very effective to reduce energy consumption of cache subsystems. Finding the right reconfiguration points in a task and selecting appropriate cache configurations for each phase are the primary challenges in phase-based DCR. In this paper, we present a novel intra-task dynamic cache reconfiguration technique using a detailed cache model, and tune a highly-configurable cache on a per-phase basis compared to tuning once per application. Experimental results demonstrate that our intra-task DCR can achieve up to 27% (12% on average) and 19% (7% on average) energy savings for instruction and data caches, respectively, without introducing any performance penalty.
Starting Page	430
Ending Page	435
File Size	413435
Page Count	6
File Format	PDF
ISBN	9781467304382
ISSN	10639667
DOI	10.1109/VLSID.2012.109
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-01-07
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy consumption Benchmark testing Profitability Tuning Phase detection Heuristic algorithms Embedded systems Dynamic Cache Reconfiguration Intra-Task
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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