NDLI: On methods to improve location based logic diagnosis

Content Provider	IEEE Xplore Digital Library
Author	Wei Zou Wu-Tung Cheng Reddy, S.M. Huaxing Tang
Copyright Year	2005
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Iowa Univ., USA (Wei Zou)
Abstract	The general flow of location based logic diagnosis begins with finding a set of locations which can explain one or more single location at-a time (SLAT) failing patterns [Bartenstein, 2001], then a heuristic method is used to find subsets of locations which can explain all the SLAT failing patterns are determined as the results of logic diagnosis. However, since the observed test fails may correspond to logic failures from multiple locations, the existing heuristics may find incomplete or wrong locations of the defect due to the ignorance of the correlation between the logic failure locations and the defect. In this work, we first propose several techniques to analyze the relationship of logic failure locations and collapse multiple logic failure locations into single defects, and then use a minimum set covering algorithm to find final diagnosis candidates. In this way, we can not only identify defect type but also improve diagnosis accuracy and resolution. Experimental results on both simulated defects and silicon defects are given to demonstrate effectiveness of the proposed method.
File Size	227877
File Format	PDF
ISBN	0769525024
ISSN	10639667
DOI	10.1109/VLSID.2006.123
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-01-03
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit faults Logic testing Logic devices Fault diagnosis Failure analysis Circuit testing Circuit simulation Production Integrated circuit interconnections Algorithm design and analysis
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in