NDLI: A game-theoretic approach for binding in behavioral synthesis

Content Provider	IEEE Xplore Digital Library
Author	Murugavel, A.K. Ranganathan, N.
Copyright Year	2003
Description	Author affiliation: Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA (Murugavel, A.K.; Ranganathan, N.)
Abstract	In this paper, we describe a new algorithm based on game theory for minimizing the average power of a circuit during binding in behavioral synthesis. The problem is formulated as an auction based non-cooperative finite game for which a solution is proposed based on the Nash equilibrium. For the binding algorithm, each functional unit in the datapath is modeled as a player bidding for executing an operation with the estimated power consumption as the bid. The operations are bound to the modules such that the total power consumption is minimized. Further, the techniques of functional unit sharing, path balancing and register assignment are incorporated within the binding algorithm for power reduction. The proposed algorithm yields power reduction without any increase in area or delay overhead. Experimental results indicate that the proposed game theoretic solution for binding yields an improvement of 13.9% over the linear programming (LP) method.
Sponsorship	VLSI Soc. India (VSI) Minstr. Commun. & Inf. Technol., Govern. India IEEE Circuits & Syst. Soc. ACM SIGDA NASSCOM
Starting Page	452
Ending Page	458
File Size	395855
Page Count	7
File Format	PDF
ISBN	0769518680
ISSN	10639667
DOI	10.1109/ICVD.2003.1183176
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-01-04
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Game theory Energy consumption Registers Circuit synthesis Very large scale integration Processor scheduling Nash equilibrium Linear programming Portable computers High performance computing
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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